Data Analysis Results and Discussion of Different Flip Flop Configurations

Data Analysis Results and Discussion of Different Flip Flop Configurations

Author by Dr. Samson O. Ogunlere

Journal/Publisher: International Research Journal Of Engineering And Technology (irjet)

Volume/Edition: 2

Language: English

Pages: 425 - 430

Abstract

The design of an efficient and high performance memory element known as Flip-Flop Extension verification is carried out to ascertain its efficiency and effectiveness over the conventional SR and JK Flip Flops. This is achieved through the analysis of the design data of the Flip Flop Extension in comparison with the existing related conventional Flip Flops frameworks to examine and evaluate the significant advantages of the Flip Flops Extension at 87.5% and or 100?tive states utilization against SR at 50% and JK at 75?tive states utilizations. From the data analysis carried out, the Flip Flop Extension at 87.5% is found suitable to be used as memory element with speed, size and power consumption performance advantage over the conventional SR and JK Flip Flops; while the Flip Flop ‘No Rest state’ at 100?tive state utilization cannot be used to build Storage devices, but they may still be useful in other digital application areas yet to be examined.


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